The disclosure relates to a method of fabricating a semiconductor device, and more particularly, to a method of fabricating a three-dimensional semiconductor device.
Semiconductor devices have been integrated for satisfying performance and manufacture costs which are desired by users. Since integration of the semiconductor devices is an important factor in determining product price, high integration is increasingly desired in particular. Integration of typical two-dimensional or planar semiconductor devices may be primarily determined by the area occupied by a unit memory cell, such that it is greatly influenced by the level of technology for forming fine patterns. However, expensive process equipment used to increase pattern fineness may set a practical limit on the increase of integration of the two-dimensional or planar semiconductor devices. Therefore, there have been proposed three-dimensional semiconductor memory devices having three-dimensionally arranged memory cells.